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100 mhz to 4000 mhz rf/if digitally controlled vga data sheet ADL5243 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2011 analog devices, inc. all rights reserved. features operating frequency from 100 mhz to 4000 mhz digitally controlled vga with serial and parallel interfaces 6-bit, 0.5 db digital step attenuator 31.5 db gain control range with 0.25 db step accuracy gain block amplifier 1 gain: 19.2 db at 2140 mhz oip3: 40.2 dbm at 2140 mhz p1db: 19.8 dbm at 2140 mhz noise figure: 2.9 db at 2140 mhz ? w driver amplifier 2 gain: 14.2 db at 2140 mhz oip3: 41.1 dbm at 2140 mhz p1db: 26.0 dbm at 2140 mhz noise figure: 3.7 db at 2140 mhz gain block, dsa, or ? w driver amplifier can be first low quiescent current of 175 ma the companion adl5240 integrates a gain block with dsa applications wireless infrastructure automated test equipment rf/if gain control general description the ADL5243 is a high performance, digitally controlled variable gain amplifier operating from 100 mhz to 4000 mhz. the vga integrates two high performance amplifiers and a digital step attenuator (dsa). amplifier 1 (amp1) is an internally matched gain block amplifier with 20 db gain, and amplifier 2 (amp2) is a broadband ? w driver amplifier. the dsa is 6-bit with a 31.5 db gain control range, 0.5 db steps, and 0.25 db step accuracy. the attenuation of the dsa can be controlled using a serial or parallel interface. the gain block and dsa are internally matched to 50 at their inputs and outputs, and all three internal devices are separately biased. the separate bias allows all or part of the ADL5243 to be used, which allows for easy reuse throughout a design. the pinout of the ADL5243 also enables the gain block, dsa, or ? w driver amplifier to be first, giving the vga maximum flexibility in a signal chain. the ADL5243 consumes 175 ma and operates off a single supply ranging from 4.75 v to 5.25 v. the vga is packaged in a thermally efficient, 5 mm 5 mm, 32-lead lfcsp and is fully specified for operation from ?40c to +85c. a fully populated evaluation board is available. functional block diagram ADL5243 amp1 9 nc 10 amp1in 11 nc 12 nc 13 nc 14 nc 15 amp2out/vcc2 16 vbias serial/parallel interface 24 vdd 23 nc 22 nc 21 dsaout 20 nc 19 amp2in 18 nc 17 nc 0.5db 1db 2db 4db 8db 16db 32 sel 31 d0/clk 30 d1/data 29 d2/le 28 d3 27 d4 26 d5 25 d6 1 vdd 2 nc 3 nc 4 dsain 5 nc 6 amp1out/vcc 7 nc 8 nc amp2 09431-001 figure 1. www.datasheet.co.kr datasheet pdf - http://www..net/
ADL5243 data sheet rev. a | page 2 of 32 table of contents features .............................................................................................. 1 ? general description ......................................................................... 1 ? functional block diagram .............................................................. 1 ? revision history ............................................................................... 2 ? specifications..................................................................................... 3 ? absolute maximum ratings............................................................ 9 ? esd caution.................................................................................. 9 ? pin configuration and function descriptions........................... 10 ? typical performance characteristics ........................................... 11 ? applications information .............................................................. 20 ? basic layout connections......................................................... 20 ? spi timing................................................................................... 21 ? ADL5243 amplifier 2 matching .............................................. 23 ? ADL5243 loop performance.................................................... 26 ? thermal considerations............................................................ 26 ? soldering information and recommended pcb land pattern................................................................................ 26 ? evaluation board ............................................................................ 27 ? outline dimensions ....................................................................... 30 ? ordering guide .......................................................................... 30 ? revision history 8/11rev. 0 to rev. a changes to features section............................................................ 1 7/11revision 0: initial version www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet ADL5243 rev. a | page 3 of 32 specifications vdd = 5v, vcc = 5v, vcc2 = 5v, t a = 25 o c. table 1. parameter conditions min typ max unit overall function frequency range 100 4000 mhz amplifier 1 frequency = 150 mhz using the amp1in and amp1out pins gain 18.2 db vs. frequency 50 mhz 0.97 db vs. temperature ?40c t a +85c 0.07 db vs. supply 4.75 v to 5.25 v 0.03 db input return loss s11 ?10.4 db output return loss s22 ?8.2 db output 1 db compression point 18.4 dbm output third-order intercept ?f = 1 mhz, p out = 3 dbm/tone 29.5 dbm noise figure 2.8 db amplifier 1 frequency = 450 mhz using th e amp1in and amp1out pins gain 20.6 db vs. frequency 50 mhz 0.10 db vs. temperature ?40c t a +85c 0.36 db vs. supply 4.75 v to 5.25 v 0.01 db input return loss s11 ?17.8 db output return loss s22 ?16.5 db output 1 db compression point 19.5 dbm output third-order intercept ?f = 1 mhz, p out = 3 dbm/tone 38.4 dbm noise figure 2.8 db amplifier 1 frequency = 748 mhz using th e amp1in and amp1out pins gain 20.8 db vs. frequency 50 mhz 0.02 db vs. temperature ?40c t a +85c 0.32 db vs. supply 4.75 v to 5.25 v 0.01 db input return loss s11 ?22.0 db output return loss s22 ?21.6 db output 1 db compression point 19.6 dbm output third-order intercept ?f = 1 mhz, p out = 3 dbm/tone 39.6 dbm noise figure 2.7 db amplifier 1 frequency = 943 mhz using th e amp1in and amp1out pins gain 19.0 20.3 22.0 db vs. frequency 18 mhz 0.01 db vs. temperature ?40c t a +85c 0.28 db vs. supply 4.75 v to 5.25 v 0.02 db input return loss s11 ?24.0 db output return loss s22 ?21.5 db output 1 db compression point 18.5 19.9 dbm output third-order intercept ?f = 1 mhz, p out = 3 dbm/tone 40.4 dbm noise figure 2.7 db www.datasheet.co.kr datasheet pdf - http://www..net/
ADL5243 data sheet rev. a | page 4 of 32 parameter conditions min typ max unit amplifier 1 frequency = 1960 mhz using th e amp1in and amp1out pins gain 19.5 db vs. frequency 30 mhz 0.02 db vs. temperature ?40c t a +85c 0.26 db vs. supply 4.75 v to 5.25 v 0.04 db input return loss s11 ?13.5 db output return loss s22 ?12.4 db output 1 db compression point 19.6 dbm output third-order intercept ?f = 1 mhz, p out = 3 dbm/tone 40.4 dbm noise figure 2.9 db amplifier 1 frequency = 2140 mhz using th e amp1in and amp1out pins gain 17.5 19.2 21.5 db vs. frequency 30 mhz 0.02 db vs. temperature ?40c t a +85c 0.26 db vs. supply 4.75 v to 5.25 v 0.05 db input return loss s11 ?13.3 db output return loss s22 ?12.2 db output 1 db compression point 17.5 19.8 dbm output third-order intercept ?f = 1 mhz, p out = 3 dbm/tone 40.2 dbm noise figure 2.9 db amplifier 1 frequency = 2630 mhz using th e amp1in and amp1out pins gain 17.5 19.0 21.5 db vs. frequency 60 mhz 0.03 db vs. temperature ?40c t a +85c 0.22 db vs. supply 4.75 v to 5.25 v 0.05 db input return loss s11 ?17.3 db output return loss s22 ?12.3 db output 1 db compression point 17.5 19.5 dbm output third-order intercept ?f = 1 mhz, p out = 3 dbm/tone 39.5 dbm noise figure 2.9 db amplifier 1 frequency = 3600 mhz using th e amp1in and amp1out pins gain 18.0 db vs. frequency 100 mhz 0.10 db vs. temperature ?40c t a +85c 0.05 db vs. supply 4.75 v to 5.25 v 0.12 db input return loss s11 ?30.7 db output return loss s22 ?9.0 db output 1 db compression point 18.0 dbm output third-order intercept ?f = 1 mhz, p out = 3 dbm/tone 34.6 dbm noise figure 3.3 db amplifier 2 frequency = 748 mhz using th e amp2in and amp2out pins gain 17.5 db vs. frequency 50 mhz 0.14 db input return loss s11 ?12.7 db output return loss s22 ?8.6 db output 1 db compression point 24.7 dbm output third-order intercept ?f = 1 mhz, p out = 5 dbm/tone 41.5 dbm noise figure 5.6 db www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet ADL5243 rev. a | page 5 of 32 parameter conditions min typ max unit amplifier 2 frequency = 943 mhz using th e amp2in and amp2out pins gain 16.5 db vs. frequency 18 mhz 0.05 db vs. temperature ?40c t a +85c 0.39 db vs. supply 4.75 v to 5.25 v 0.10 db input return loss s11 ?11.2 db output return loss s22 ?8.1 db output 1 db compression point 25.0 dbm output third-order intercept ?f = 1 mhz, p out = 5 dbm/tone 43.3 dbm noise figure 5.3 db amplifier 2 frequency = 2140 mhz using th e amp2in and amp2out pins gain 13.0 14.2 15.5 db vs. frequency 30 mhz 0.03 db vs. temperature ?40c t a +85c 0.50 db vs. supply 4.75 v to 5.25 v 0.09 db input return loss s11 ?10.7 db output return loss s22 ?8.1 db output 1 db compression point 26.0 dbm output third-order intercept ?f = 1 mhz, p out = 5 dbm/tone 41.1 dbm noise figure 3.7 db amplifier 2 frequency = 2630 mhz using th e amp2in and amp2out pins gain 13.0 db vs. frequency 60 mhz 0.13 db vs. temperature ?40c t a +85c 0.56 db vs. supply 4.75 v to 5.25 v 0.09 db input return loss s11 ?9.4 db output return loss s22 ?8.3 db output 1 db compression point 24.5 dbm output third-order intercept ?f = 1 mhz, p out = 5 dbm/tone 40.4 dbm noise figure 4.1 db dsa frequency = 150 mhz using the dsain and dsaout pins, minimum attenuation insertion loss ?1.5 db vs. frequency 50 mhz 0.12 db vs. temperature ?40c t a +85c 0.10 db attenuation range between maximum and minimum attenuation states 28.8 db attenuation step error all attenuation states 0.18 db attenuation absolute error all attenuation states 1.35 db input return loss ?13.5 db output return loss ?13.3 db input third-order intercept ?f = 1 mhz, p out = 5 dbm/tone 45.2 dbm www.datasheet.co.kr datasheet pdf - http://www..net/
ADL5243 data sheet rev. a | page 6 of 32 parameter conditions min typ max unit dsa frequency = 450 mhz using the dsain and dsaout pins, minimum attenuation insertion loss ?1.4 db vs. frequency 50 mhz 0.02 db vs. temperature ?40c t a +85c 0.12 db attenuation range between maximum and minimum attenuation states 30.7 db attenuation step error all attenuation states 0.14 db attenuation absolute error all attenuation states 0.39 db input return loss ?17.7 db output return loss ?17.4 db input third-order intercept ?f = 1 mhz, p out = 5 dbm/tone 41.2 dbm dsa frequency = 748 mhz using the dsain and dsaout pins, minimum attenuation insertion loss ?1.5 db vs. frequency 50 mhz 0.02 db vs. temperature ?40c t a +85c 0.12 db attenuation range between maximum and minimum attenuation states 30.9 db attenuation step error all attenuation states 0.15 db attenuation absolute error all attenuation states 0.30 db input return loss ?17.1 db output return loss ?17.1 db input third-order intercept ?f = 1 mhz, p out = 5 dbm/tone 40.4 dbm dsa frequency = 943 mhz using the dsain and dsaout pins, minimum attenuation insertion loss ?1.6 db vs. frequency 18 mhz 0.01 db vs. temperature ?40c t a +85c 0.13 db attenuation range between maximum and minimum attenuation states 30.9 db attenuation step error all attenuation states 0.15 db attenuation absolute error all attenuation states 0.28 db input return loss ?16.0 db output return loss ?15.9 db input 1 db compression point 30.5 dbm input third-order intercept ?f = 1 mhz, p out = 5 dbm/tone 48.3 dbm dsa frequency = 1960 mhz using the dsain and dsaout pins, minimum attenuation insertion loss ?2.5 db vs. frequency 30 mhz 0.04 db vs. temperature ?40c t a +85c 0.18 db attenuation range between maximum and minimum attenuation states 30.8 db attenuation step error all attenuation states 0.15 db attenuation absolute error all attenuation states 0.35 db input return loss ?10.3 db output return loss ?9.6 db input 1 db compression point 31.5 dbm input third-order intercept ?f = 1 mhz, p out = 5 dbm/tone 44.7 dbm www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet ADL5243 rev. a | page 7 of 32 parameter conditions min typ max unit dsa frequency = 2140 mhz using the dsain and dsaout pins, minimum attenuation insertion loss ?2.6 db vs. frequency 30 mhz 0.02 db vs. temperature ?40c t a +85c 0.19 db attenuation range between maximum and minimum attenuation states 30.9 db attenuation step error all attenuation states 0.13 db attenuation absolute error all attenuation states 0.32 db input return loss ?9.8 db output return loss ?9.3 db input 1 db compression point 31.5 dbm input third-order intercept ?f = 1 mhz, p out = 5 dbm/tone 44.6 dbm dsa frequency = 2630 mhz using the dsain and dsaout pins, minimum attenuation insertion loss ?2.8 db vs. frequency 60 mhz 0.02 db vs. temperature ?40c t a +85c 0.21 db attenuation range between maximum and minimum attenuation states 31.2 db attenuation step error all attenuation states 0.18 db attenuation absolute error all attenuation states 0.24 db input return loss ?10.0 db output return loss ?9.6 db input 1 db compression point 31.5 dbm input third-order intercept ?f = 1 mhz, p out = 5 dbm/tone 43.8 dbm dsa frequency = 3600 mhz using the dsain and dsaout pins, minimum attenuation insertion loss ?3.0 db vs. frequency 100 mhz 0.02 db vs. temperature ?40c t a +85c 0.23 db attenuation range between maximum and minimum attenuation states 31.7 db attenuation step error all attenuation states 0.38 db attenuation absolute error all attenuation states 0.18 db input return loss ?12.3 db output return loss ?11.7 db input 1 db compression point 31.0 dbm input third-order intercept ?f = 1 mhz, p out = 5 dbm/tone 42.2 dbm dsa gain settling using the dsain and dsaout pins minimum attenuation to maximum attenuation 36 ns maximum attenuation to minimum attenuation 36 ns loop frequency = 943 mhz amp1CdsaCamp2, dsa at minimum attenuation gain 34.0 db vs. frequency 18 mhz 0.10 db gain range between maximum and minimum attenuation states 29.3 db input return loss s11 ?14.2 db output return loss s22 ?10.1 db output 1 db compression point 25.1 dbm output third-order intercept ?f = 1 mhz, p out = 5 dbm/tone 42.8 dbm noise figure 2.9 db www.datasheet.co.kr datasheet pdf - http://www..net/
ADL5243 data sheet rev. a | page 8 of 32 parameter conditions min typ max unit loop frequency = 2140 mhz amp1 C dsa C amp2, dsa at minimum attenuation gain 31.3 db vs. frequency 30 mhz 0.03 db gain range between maximum and minimum attenuation states 32.5 db input return loss s11 ?9.3 db output return loss s22 ?5.4 db output 1 db compression point 25.3 dbm output third-order intercept ?f = 1 mhz, p out = 5 dbm/tone 40.0 dbm noise figure 3.1 db loop frequency = 2630 mhz amp1 C dsa C amp2, dsa at minimum attenuation gain 29.5 db vs. frequency 60 mhz 0.56 db gain range between maximum and minimum attenuation states 30.0 db input return loss s11 ?12.6 db output return loss s22 ?5.8 db output 1 db compression point 24.6 dbm output third-order intercept ?f = 1 mhz, p out = 5 dbm/tone 39.3 dbm noise figure 3.1 db power supplies voltage 4.75 5.0 5.25 v supply current amp1 89 120 ma amp2 86 120 ma dsa 0.5 ma www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet ADL5243 rev. a | page 9 of 32 absolute maximum ratings esd caution table 2. parameter rating supply voltage (vdd, vcc, vcc2) 6.5 v input power amp1in 16 dbm amp2in (50 ? impedance) 20 dbm dsain 30 dbm internal power dissipation 1.0 w ja (exposed paddle soldered down) 34.8c/w jc (exposed paddle) 6.2c/w maximum junction temperature 150c lead temperature (soldering, 60 sec) 240c operating temperature range ?40c to +85c storage temperature range ?65c to +150c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.datasheet.co.kr datasheet pdf - http://www..net/
ADL5243 data sheet rev. a | page 10 of 32 pin configuration and fu nction descriptions notes 1. nc = no connect. do not connect to this pin. 2. the exposed pad must be connected to ground. pin 1 indicator 1 vdd 2 nc 3 nc 4 dsain 5 nc 6 amp1out/vcc 7 nc 8 nc 24 vdd 23 nc 22 nc 21 dsaout 20 nc 19 amp2in 18 nc 17 nc 9 n c 1 0 a m p 1 i n 1 1 n c 1 2 n c 1 3 n c 1 4 n c 1 5 a m p 2 o u t / v c c 2 1 6 v b i a s 3 2 s e l 3 1 d 0 / c l k 3 0 d 1 / d a t a 2 9 d 2 / l e 2 8 d 3 2 7 d 4 2 6 d 5 2 5 d 6 top view (not to scale) ADL5243 09431-002 figure 2. pin configuration table 3. pin function descriptions pin no. mnemonic description 1, 24 vdd supply voltage for dsa. connect this pin to a 5 v supply. 2, 3, 5, 7, 8, 9, 11, 12, 13, 14, 17, 18, 20, 22, 23 nc no connect. do not connect to this pin. 4 dsain rf input to dsa. 6 amp1out/vcc rf output from amplifier 1/supply voltag e for amplifier 1. bias to gain block amplifier 1 is provided through a choke to this pin when connected to vcc. 10 amp1in rf input to gain block amplifier 1. 15 amp2out/vcc2 rf output from amplifier 2/supply voltage for amplifier 2. bias to driver amplifier 2 is provided through a choke to this pin when connected to vcc2. 16 vbias bias for driver amplifier 2. 19 amp2in rf input to amplifier 2. 21 dsaout rf output from dsa. 25 d6 data bit in parallel mode (lsb). connect to supply in serial mode. 26 d5 data bit in parallel mode. connect to ground in serial mode. 27 d4 data bit in parallel mode. connect to ground in serial mode. 28 d3 data bit in parallel mode. connect to ground in serial mode. 29 d2/le data bit in parallel mode /latch enable in serial mode. 30 d1/data data bit in parallel mode (msb)/data in serial mode. 31 d0/clk connect this pin to ground in parallel mode. this pin functions as a clock in serial mode. 32 sel select pin. connect this pin to the supply for parallel mode operation; connect this pin to ground for serial mode operation. epad exposed paddle. the exposed pa ddle must be connected to ground. www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet ADL5243 rev. a | page 11 of 32 typical performance characteristics 0 5 10 15 20 25 30 35 40 45 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 oip3 p1db gain nf noise figure, gain, p1db, oip3 (db, dbm) frequency (ghz) 09431-003 figure 3. amp1: gain, p1db, oip3 at p out = 3 dbm/tone and noise figure vs. frequency 17.0 17.5 22.0 21.5 21.0 20.5 20.0 19.5 19.0 18.5 18.0 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 ?40c +85c gain (db) frequency (ghz) +25c 09431-004 figure 4. amp1: gain vs. frequency and temperature ?50 ?40 ?45 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 0.1 0.5 0.9 1.3 1.7 2.1 2.5 2.9 3.3 3.7 4.1 s12 s-parameters (db) frequency (ghz) s11 s22 09431-005 figure 5. amp1: input return loss (s11), output return loss (s22), and reverse isolation (s12) vs. frequency 16 14 28 26 24 22 20 18 10 45 40 35 30 25 20 15 p1db (dbm) oip3 (dbm) frequency (ghz) 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 ?40c +25c +85c 09431-006 figure 6. amp1: oip3 at pout = 3 dbm/tone and p1db vs. frequency and temperature 22 20 42 40 38 36 34 32 30 28 26 24 ?4 161412 10 86420 ?2 oip3 (dbm) p out per tone (dbm) 150mhz 450mhz 748mhz 943mhz 1960mhz 2140mhz 2630mhz 3600mhz 09431-007 figure 7. amp1: oip3 vs. p out and frequency 1.5 2.0 2.5 3.0 3.5 4.0 5.0 4.5 04 3.63.22.82.42.0 1.6 1.20.80.4 noise figure (db) frequency (ghz) . 0 ?40c +25c +85c 09431-008 figure 8. amp1: noise figure vs. frequency and temperature www.datasheet.co.kr datasheet pdf - http://www..net/
ADL5243 data sheet rev. a | page 12 of 32 0 5 10 15 20 25 30 35 40 50 45 0.925 0.930 0.935 0.940 0.945 0.950 0.955 0.960 0.965 oip3 p1db gain nf noise figure, gain, p1db, oip3 (db, dbm) frequency (ghz) 09431-009 figure 9. amp2C943 mhz: gain, p1db, oip3 at p out = 5 dbm/tone and noise figure vs. frequency frequency (ghz) 15.0 18.0 17.5 17.0 16.5 16.0 15.5 ?40c +85c gain (db) frequency (ghz) +25c 09431-010 0.925 0.930 0.935 0.940 0.945 0.950 0.955 0.960 0.965 figure 10. amp2C943 mhz: gain vs. frequency and temperature ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 s-parameters (db) frequency (ghz) 0.80 0.85 0.90 0.95 1.00 1.05 1.10 s12 s11 s22 09431-011 figure 11. amp2C943 mhz: input return loss (s11), output return loss (s22,) and reverse isolation (s12) vs. frequency 24.5 24.0 27.0 26.5 26.0 25.5 25.0 33 45 43 41 39 37 35 p1db (dbm) oip3 (dbm) frequency (ghz) ?40c +25c +85c 09431-012 0.925 0.930 0.935 0.940 0.945 0.950 0.955 0.960 0.965 figure 12. amp2C943 mhz: oip3 at p out = 5 dbm/tone and p1db vs. frequency and temperature 38 37 45 44 43 42 41 40 39 ?4 18 16 1210 86420 ?2 oip3 (dbm) p out per tone (dbm) 14 925mhz 943mhz 961mhz 09431-013 figure 13. amp2C943 mhz: oip3 vs. p out and frequency 3.5 4.5 5.0 5.5 6.0 6.5 7.5 7.0 0.80 1.101.071.041.010.980.950.920.89 0.86 0.83 noise figure (db) frequency (ghz) 4.0 ?40c ?40c +25c +85c 09431-014 figure 14. amp2C943 mhz: noise figu re vs. frequency and temperature www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet ADL5243 rev. a | page 13 of 32 0 5 10 15 20 25 30 35 40 45 2.11 2.12 2.13 2.14 2.15 2.16 2.17 noise figure, gain, p1db, oip3 (db, dbm) frequency (ghz) p1db oip3 gain nf 09431-015 figure 15. amp2C2140 mhz: gain, p1db, oip3 at p out = 5 dbm/tone and noise figure vs. frequency 12.0 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 gain (db) ?40c +25c +85c 2.11 2.12 2.13 2.14 2.15 2.16 2.17 frequency (ghz) 09431-016 figure 16. amp2C2140 mhz: gain vs. frequency and temperature ?30 ?25 ?20 ?15 ?10 ?5 0 s-parameters (db) frequency (ghz) 2.00 2.05 2.10 2.15 2.20 2.25 2.30 s12 s11 s22 09431-017 figure 17. amp2C2140 mhz: input return loss (s11), output return loss (s22), and reverse isolation (s12) vs. frequency 31 33 35 37 39 41 43 25.0 25.5 26.0 26.5 27.0 27.5 28.0 oip3 (dbm) p1db (dbm) ?40c +25c +85c 2.11 2.12 2.13 2.14 2.15 2.16 2.17 frequency (ghz) 09431-018 figure 18. amp2C2140 mhz: oip3 at p out = 5 dbm/tone and p1db vs. frequency and temperature 34 35 36 37 38 39 40 41 42 ?6 ?4 ?2 0 2 4 6 8 10 12 14 16 18 20 22 oip3 (dbm) p out per tone (dbm) 2.11ghz 2.14ghz 2.17ghz 09431-019 figure 19. amp2C2140 mhz: oip3 vs. p out and frequency 2.0 2.5 3.0 3.5 4.0 4.5 5.5 5.0 2.00 2.302.272.242.212.182.152.122.09 2.06 2.03 noise figure (db) frequency (ghz) ?40c +25c +85c 09431-020 figure 20. amp2C2140 mhz: noise figure vs. frequency and temperature www.datasheet.co.kr datasheet pdf - http://www..net/
ADL5243 data sheet rev. a | page 14 of 32 0 5 10 15 20 25 30 35 40 45 2.57 2.59 2.61 2.63 2.65 2.67 2.69 noise figure, gain, p1db, oip3 (db, dbm) frequency (ghz) p1db oip3 gain nf 09431-021 figure 21. amp2C2630 mhz: gain, p1db, oip3 at p out = 5 dbm/tone and noise figure vs. frequency 12.0 12.5 11.0 11.5 13.0 13.5 14.0 14.5 15.0 gain (db) ?40c +25c +85c 2.57 2.59 2.61 2.63 2.65 2.67 2.69 frequency (ghz) 09431-022 figure 22. amp2C2630 mhz: gain vs. frequency and temperature ?30 ?25 ?20 ?15 ?10 ?5 0 s-parameters (db) frequency (ghz) 2.50 2.55 2.60 2.65 2.70 2.75 2.80 s12 s11 s22 09431-023 figure 23. amp2C2630 mhz: input return loss (s11), output return loss (s22), and reverse isolation (s12) vs. frequency 23.0 23.5 24.5 25.5 26.5 27.5 24.0 25.0 26.0 27.0 28.0 37.0 37.5 38.5 39.5 40.5 41.5 38.0 39.0 40.0 41.0 42.0 oip3 (dbm) p1db (dbm) ?40c +25c +85c 2.57 2.59 2.61 2.63 2.65 2.67 2.69 frequency (ghz) 09431-024 figure 24. amp2C2630 mhz: oip3 at p out = 5 dbm/tone and p1db vs. frequency and temperature 30 32 34 36 31 33 35 37 38 39 40 41 42 ?6 ?4 ?2 0 2 4 6 8 10 12 14 16 18 20 22 oip3 (dbm) p out per tone (dbm) 2.57ghz 2.63ghz 2.69ghz 09431-025 figure 25. amp2C2630 mhz: oip3 vs. p out and frequency 2.0 2.5 3.0 3.5 4.0 4.5 6.0 5.5 5.0 2.50 2.802.77 2.74 2.712.68 2.65 2.622.59 2.56 2.53 noise figure (db) frequency (ghz) ?40c +25c +85c 09431-026 figure 26. amp2C2630 mhz: noise figure vs. frequency and temperature www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet ADL5243 rev. a | page 15 of 32 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 0.1 4.13.73.32.92.52.11.71.30.90.5 attenuation (db) frequency (ghz) 31.5db 09431-027 0db figure 27. dsa: attenuation vs. frequency ?36 ?31 ?26 ?21 ?16 ?11 ?6 ? 1 0.1 4.1 3.7 3.32.92.5 2.1 1.71.30.90.5 attenuation (db) frequency (ghz) 0db 4db 8db 16db 31.5db ?40c +25c +85c 09431-028 figure 28. dsa: attenuation vs. frequency and temperature ?0.5 ?0.4 ?0.3 ?0.2 ?0.1 0 0.1 0.2 0.3 0.4 0.5 03 2 2824 20 1612 84 step error (db) attenuation (db) 450mhz 748mhz 943mhz 1960mhz 2140mhz 2630mhz 3600mhz 09431-029 figure 29. dsa: step error vs. attenuation ?1.0 ?0.8 ?0.6 ?0.4 ?0.2 0 0.2 0.4 0.6 0.8 1.0 03 2824 20 1612 84 absolute error (db) attenuation (db) 2 450mhz 748mhz 943mhz 1960mhz 2140mhz 2630mhz 3600mhz 09431-030 figure 30. dsa: absolute error vs. attenuation ?30 ?25 ?20 ?15 ?10 ?5 0 0.1 4.13.7 3.32.92.52.11.7 1.30.90.5 input return loss (db) frequency (ghz) 31.5db 09431-031 0db figure 31. dsa: input return loss vs. frequency, all states ?30 ?25 ?20 ?15 ?10 ?5 0 0.1 4.13.7 3.32.92.52.11.7 1.30.90.5 output return loss (db) frequency (ghz) 09431-032 31.5db 0db figure 32. dsa: output return loss vs. frequency, all states www.datasheet.co.kr datasheet pdf - http://www..net/
ADL5243 data sheet rev. a | page 16 of 32 20 25 30 35 40 45 50 30 31 32 33 34 35 36 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3 3.6 iip3 (dbm) ip1db (dbm) frequency (ghz) iip3 ip1db 09431-033 figure 33. dsa: input p1db and input ip3 vs. frequency, minimum attenuation state ch3 2.00v ch3 2.00v ch4 200mv m10ns 10gs/s it 1.0ps/pt a ch3 1.24v 3 4 09431-034 figure 34. dsa: gain settling time, 0 db to 31.5 db ch3 2.00v ch3 2.00v ch4 200mv m10ns 10gs/s it 1.0ps/pt a ch3 1.24v 3 4 09431-035 figure 35. dsa: gain settling time, 31.5 db to 0 db ?150 ?100 ?50 0 50 100 150 0 4 8 12 16 20 24 28 32 phase (degrees) attenuation (db) 943mhz 1960mhz 2140mhz 2630mhz 09431-036 figure 36. dsa: phase vs. attenuation 0 5 10 15 20 25 30 35 40 45 50 925 930 935 940 945 950 955 960 965 noise figure, gain, p1db, oip3 (db, dbm) frequency (mhz) p1db oip3 gain nf 09431-037 figure 37. loopC943 mhz: gain, p1db, oip3 at p out = 5 dbm/tone and noise figure vs. frequency, mi nimum attenu ation state ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 0.70 0.75 0.80 0.85 0.90 0.95 1.00 1.05 1.10 s-parameters (db) frequency (ghz) s11 s12 s22 09431-038 figure 38. loopC943 mhz: input return loss (s11), output return loss (s22), and reverse isolation (s12) vs. freq uency, minimum attenuation state www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet ADL5243 rev. a | page 17 of 32 32 34 36 38 40 42 44 46 4 6 8 10 12 14 16 18 20 22 oip3 (dbm) p out per tone (dbm) 925mhz 943mhz 961mhz 09431-039 figure 39. loopC943 mhz: oip3 vs. p out and frequency, minimum attenuation state 0 5 10 15 20 25 30 35 40 45 2.11 2.12 2.13 2.14 2.15 2.16 2.17 noise figure, gain, p1db, oip3 (db, dbm) frequency (ghz) p1db oip3 gain nf 09431-040 figure 40. loopC2140 mhz: gain, p1db, oip3 at p out = 5 dbm/tone and noise figure vs. frequency, mi nimum attenu ation state ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 2.00 2.05 2.10 2.15 2.20 2.25 2.30 s-parameters (db) frequency (ghz) s11 s12 s22 09431-041 figure 41. loop C 2140 mhz: input return loss (s11), output return loss (s22), and reverse isolation (s12) vs. frequency, minimum attenuation state 34 35 36 37 38 39 40 42 41 13579111315171921 oip3 (dbm) p out per tone (dbm) 2.11ghz 2.14ghz 2.17ghz 09431-042 figure 42. loopC2140 mhz: oip3 vs. p out and frequency, minimum attenuation state 0 5 10 15 20 25 30 35 40 45 2.57 2.59 2.61 2.63 2.65 2.67 2.69 noise figure, gain, p1db, oip3 (db, dbm) frequency (ghz) p1db oip3 gain nf 09431-043 figure 43. loopC2630 mhz: gain, p1db, oip3 at p out = 5 dbm/tone and noise figure vs. frequency, mi nimum attenu ation state ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 2.50 2.55 2.60 2.65 2.70 2.75 2.80 2.85 2.90 s-parameters (db) frequency (ghz) s12 s22 s11 09431-044 figure 44. loopC2630 mhz: input re turn loss (s11), output return loss (s22), and reverse isolation (s12) vs. frequency, minimum attenuation state www.datasheet.co.kr datasheet pdf - http://www..net/
ADL5243 data sheet rev. a | page 18 of 32 33 34 35 36 37 38 39 40 42 41 0 2 4 6 8 1012141618 oip3 (dbm) p out per tone (dbm) 2.57ghz 2.63ghz 2.69ghz 09431-045 figure 45. loopC2630 mhz: oip3 vs. p out and frequency, minimum attenuation state 70 75 80 85 90 95 100 105 110 ?40 ?30 ?20 ?10 0 10 20 30 40 50 60 70 80 90 supply current (ma) temperature (c) 4.75v 5.00v 5.25v 09431-046 figure 46. amp1: supply current vs. voltage and temperature 60 110 105 100 95 90 80 70 65 75 85 ?40 ?30 ?20 ?10 0 10 20 30 40 50 60 70 80 90 supply current (ma) temperature (c) 5.25v 5.00v 5.00v 4.75v 09431-047 figure 47. amp2: supply current vs. voltage and temperature 0 5 10 15 20 25 30 35 40 45 18.3 18.4 18.5 18.6 18.7 18.8 18.9 19.0 19.1 19.2 19.3 19.4 19.5 19.6 19.7 19.8 19.9 20.0 percentage (%) gain (db) 09431-048 figure 48. amp1: gain distribution at 2140 mhz 0 5 10 15 20 25 18.8 18.9 19.0 19.1 19.2 19.3 19.4 19.5 19.6 19.7 19.8 19.9 20.0 20.1 20.2 20.3 20.4 20.5 percentage (%) p1db (dbm) 09431-049 figure 49. amp1: p1db distribution at 2140 mhz 0 5 10 15 20 25 30 35 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 percentage (%) oip3 (dbm) 09431-050 figure 50. amp1: oip3 distribution at 2140 mhz www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet ADL5243 rev. a | page 19 of 32 0 10 20 30 40 50 60 70 80 90 100 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 percentage (%) noise figure (db) 09431-051 figure 51. amp1: noise figure distribution at 2140 mhz 0 5 10 15 20 25 30 35 40 13.3 13.4 13.5 13.6 13.7 13.8 13.9 14.0 14.1 14.2 14.3 14.4 14.5 14.6 14.7 14.8 14.9 15.0 percentage (%) gain (db) 09431-052 figure 52. amp2: gain distribution at 2140 mhz 0 5 10 15 20 25 30 35 40 45 50 25.2 25.3 25.4 25.5 25.6 25.7 25.8 25.9 26.0 26.1 26.2 26.3 26.4 26.5 26.6 26.7 26.8 26.9 percentage (%) p1db (dbm) 09431-053 figure 53. amp2: p1db distribution at 2140 mhz 0 10 20 30 40 50 60 70 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 percentage (%) oip3 (dbm) 09431-054 figure 54. amp2: oip3 distribution at 2140 mhz 0 10 20 30 40 50 60 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 4.1 4.2 4.3 4.4 4.5 percentage (%) noise figure (db) 09431-055 figure 55. amp2: noise figure distribution at 2140 mhz www.datasheet.co.kr datasheet pdf - http://www..net/
ADL5243 data sheet rev. a | page 20 of 32 applications information basic layout connections the basic connections for operating the ADL5243 are shown in figure 56. the schematic is configured for 2140 mhz operation. nc vdd nc vbias nc nc nc nc d1/data nc d2/le d3 d5 d4 dsaout nc nc d6 nc amp2in d0/clk sel amp2out/vcc2 nc nc vdd dsain ADL5243 nc nc amp1out/vcc nc serial parallel interface amp1in vdd 100pf vdd 0.01f amp1in dsain dsaout 0.1f c21 c1 100pf amp1out c4 0.1f c5 2.2pf amp2in c27 10pf c8 c17 1.8pf c28 1 2 3 4 5 6 7 8 910 16 1514131211 24 23 22 21 20 19 18 17 32 31 252627 28 29 30 c15 vcc 470nh 68pf c14 1.2nf c13 1f c3 amp2out c23 c22 l2 c25 c20 1pf 10f 10pf 9.5nh 10nf 10pf vcc2 09431-056 figure 56. basic connections www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet ADL5243 rev. a | page 21 of 32 amplifier 1 power supply amp1 in the ADL5243 is a broadband gain block. the dc bias is supplied through inductor l1 and is connected to the amp1out pin. three decoupling capacitors (c13, c14, and c25) are used to prevent rf signals from propagating on the dc lines. the dc supply ranges from 4.75 v to 5.25 v and should be connected to the vcc test pin. amplifier 1 rf input interface pin 10 is the rf input for amp1 of the ADL5243 . the amplifier is internally matched to 50 at the input; therefore, no external components are required. only a dc blocking capacitor (c21) is required. amplifier 1 rf output interface pin 6 is the rf output for amp1 of the ADL5243 . the amplifier is internally matched to 50 at the output as well; therefore, no external components are required. only a dc blocking capacitor (c4) is required. the bias is provided through this pin via a choke inductor, l1. amplifier 2 power supply the collector bias for amp2 is supplied through inductor l2 and is connected to the amp2out pin, whereas the base bias is provided through pin 16. the base bias is connected to the same supply pin as the collector bias. three decoupling capacitors (c3, c20, and c25) are used to prevent rf signals from propagating on the dc lines. the dc supply ranges from 4.75 v to 5.25 v and should be connected to the vcc2 test pin. amplifier 2 rf input interface pin 19 is the rf input for amp2 of the ADL5243 . the input of the amplifier is easily matched to 50 with a combination of series and shunt capacitors and a microstrip line serving as an inductor. figure 56 shows the input matching components and is configured for 2140 mhz. amplifier 2 rf output interface pin 15 is the rf input for amp2 of the ADL5243 . the output of the amplifier is easily matched to 50 with a combination of series and shunt capacitors and a microstrip line serving as an inductor. additionally, bias is provided through this pin. figure 56 shows the output matching components and is configured for 2140 mhz. dsa rf input interface pin 4 is the rf input for the dsa of the ADL5243 . the input impedance of the dsa is close to 50 over the entire frequency range; therefore, no external components are required. only a dc blocking capacitor (c1) is required. dsa rf output interface pin 21 is the rf output for the dsa of the ADL5243 . the output impedance of the dsa is close to 50 over the entire frequency range; therefore, no external components are required. only a dc blocking capacitor (c5) is required. dsa spi interface the dsa of the ADL5243 can operate in either serial or parallel mode. pin 32 (sel) controls the mode of operation. for serial mode operation, connect sel to ground, and for parallel mode operation, connect sel to vdd. in parallel mode, pin 25 to pin 30 (d6 to d1) are the data bits, with d6 being the lsb. connect pin 31 (d0) to ground during parallel mode of operation. in serial mode, pin 29 is the latch enable (le), pin 30 is the data (data), and pin 31 is the clock (clk). pin 26, pin 27, and pin 28 are not used in the serial mode and should be connected to ground. pin 25 (d6) should be connected to vdd during the serial mode of operation. to prevent noise from coupling onto the digital signals, an rc filter can be used on each data line. spi timing spi timing sequence figure 58 shows the timing sequence for the spi function using a 6-bit operation. the clock can be as fast as 20 mhz. in serial mode operation, register b5 (msb) is first, and register b0 (lsb) is last. table 4. mode selection table pin 32 (sel) functionality connect to ground serial mode connect to supply parallel mode table 5. spi timing specifications parameter limit unit test conditions/comments f clk 10 mhz data clock frequency t 1 30 ns min clock high time t 2 30 ns min clock low time t 3 10 ns min data to clock setup time t 4 10 ns min clock to data hold time t 5 10 ns min clock low to le setup time t 6 30 ns min le pulse width www.datasheet.co.kr datasheet pdf - http://www..net/
ADL5243 data sheet rev. a | page 22 of 32 clk data le b4 b3 b1 msb b5 lsb b0 b2 t 6 t 5 t 1 t 2 t 4 t 3 09431-057 figure 57. spi timing diagram (data loaded msb first) b4 b3 b1 msb b5 lsb b0 b2 d0/clk d1/data d2/le d6 09431-058 figure 58. spi timing sequence table 6. dsa attenuation truth tableserial mode attenuation state b5 msb b4 b3 b2 b1 b0 sb 0 db (reference) 1 1 1 1 1 1 0.5 db 1 1 1 1 1 0 1.0 db 1 1 1 1 0 1 2.0 db 1 1 1 0 1 1 4.0 db 1 1 0 1 1 1 8.0 db 1 0 1 1 1 1 16.0 db 0 1 1 1 1 1 31.5 db 0 0 0 0 0 0 table 7. dsa attenuation truth tableparallel mode attenuation state d1 msb d2 d3 d4 d5 d6 sb 0 db (reference) 1 1 1 1 1 1 0.5 db 1 1 1 1 1 0 1.0 db 1 1 1 1 0 1 2.0 db 1 1 1 0 1 1 4.0 db 1 1 0 1 1 1 8.0 db 1 0 1 1 1 1 16.0 db 0 1 1 1 1 1 31.5 db 0 0 0 0 0 0 www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet ADL5243 rev. a | page 23 of 32 ADL5243 amplifier 2 matching the amp2 input and output of the ADL5243 can be easily matched to 50 with two or three external components and the microstrip line used as an inductor. tabl e 8 lists the required matching components values. all capacitors are murata grm155 series (0402 size), and inductor l1 is a coilcraft? 0603cs series (0603 size). for all frequency bands, the placement of capacitors c22, c26, and c28 is critical. table 9 lists the recommended component spacing of c22, c26, and c28 for the various frequencies. the component spacing is referenced from the center of the component to the edge of the package. figure 59 to figure 62 show the graphical represent- ation of the matching network. table 8. component values frequency c27 c26 c28 c8 c22 c23 l2 r10 r12 748 mhz 0 open 5.1 pf 12 pf 1.3 pf 100 pf 56 nh 18 3.9 nh 943 mhz 0 3.9 pf open 6 pf 1.3 pf 100 pf 56 nh 18 3.3 nh 2140 mhz 2.2 pf open 1.8 pf 10 pf 1 pf 10 pf 9.5 nh 0 0 2630 mhz 2.7 pf 1.1 pf open 10 pf 1.3 pf 20 pf 9.5 nh 0 0 table 9. component spacing frequency c26: 1 (mils) c28: 2 (mils) c22: 3 (mils) 748 mhz n/a 315 201 943 mhz 236 n/a 394 2140 mhz n/a 366 244 2630 mhz 126 n/a 240 www.datasheet.co.kr datasheet pdf - http://www..net/
ADL5243 data sheet rev. a | page 24 of 32 amp2out 20 19 18 17 13 14 15 16 amp2in nc nc amp2out/vcc2 vbias amp2in c27 c28 l2 56nh nc ADL5243 0 ? 2 1 3 nc nc 5.1pf c8 12pf c26 open r10 18? r12 3.9nh c22 1.3pf c23 100pf 09431-061 figure 59. amp2: matching circuit at 748 mhz amp2out 20 19 18 17 13 14 15 16 amp2in nc nc amp2out//vcc2 vbias amp2in c27 c28 l2 56nh nc ADL5243 0 ? 2 1 3 nc nc open c8 6pf c26 3.9pf r10 18? r12 3.3nh c22 1.3pf c23 100pf 09431-062 figure 60. amp2: matching circuit at 943 mhz www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet ADL5243 rev. a | page 25 of 32 amp2out 20 19 18 17 13 14 15 16 amp2in nc nc amp2out/vcc2 vbias amp2in c27 c28 l2 9.5nh nc ADL5243 2.2pf 2 1 3 nc nc 1.8pf c8 10pf c26 open r10 0 ? r12 0 ? c22 1pf c23 10pf 09431-064 figure 61. amp2: matching circuit at 2140 mhz amp2out 20 19 18 17 13 14 15 16 amp2in nc nc amp2out//vcc2 vbias amp2in c27 c28 l2 9.5nh nc ADL5243 2.7pf 2 1 3 nc nc open c8 10pf c26 1.1pf r10 0 ? r12 0 ? c22 1.3pf c23 20pf 09431-065 figure 62. amp2: matching circuit at 2630 mhz www.datasheet.co.kr datasheet pdf - http://www..net/
ADL5243 data sheet rev. a | page 26 of 32 ADL5243 loop performance the typical configuration of the ADL5243 is to connect in amp1-dsa-amp2 mode, as shown in figure 63 . because amp1and dsa are broadband in nature and internally matched, only an ac-coupling capacitor is required between them. the amp2 is externally matched for each frequency band of operation, and these matching elements should be placed between the dsa and amp2 and at the output of amp2. figure 37 to figure 45 show the performance of the ADL5243 when connected in a loop for the three primary frequency bands of operation, namely 943 mhz, 2140 mhz, and 2630 mhz. amp1 rfin ADL5243 amp2 dsa imn omn rfout v cc2 vcc vdd/spi 09431-067 figure 63. ADL5243 loop block diagram thermal considerations the ADL5243 is packaged in a thermally efficient, 5 mm 5 mm, 32-lead lfcsp. the thermal resistance from junction to air ( ja ) is 34.8c/w. the thermal resistance for the product was extracted assuming a standard 4-layer jedec board with 25 copper platter thermal vias. the thermal vias are filled with conductive copper paste, ae3030, with a thermal conductivity of 7.8 w/mk and thermal expansion as follows: 1 of 4 10 ?5 /c and 2 of 8.6 10 ?5 /c. the thermal resistance from junction to case ( jc ) is 6.2c/w, where case is the exposed pad of the lead frame package. for the best thermal performance, it is recommended to add as many thermal vias as possible under the exposed pad of the lfcsp. the above thermal resistance numbers assume a minimum of 25 thermal vias arranged in a 5 5 array with a via diameter of 13 mils, via pad of 25 mils, and pitch of 25 mils. the vias are plated with copper, and the drill hole is filled with a conductive copper paste. for optimal performance, it is recommended to fill the thermal vias with a conductive paste of equivalent thermal conductivity, as mentioned above, or use an external heat sink to dissipate the heat quickly without affecting the die junction temperature. it is also recommended to extend the ground pattern as shown in figure 64 to improve thermal efficiency. soldering information and recommended pcb land pattern figure 64 shows the recommended land pattern for the ADL5243 . to minimize thermal impedance, the exposed paddle on the 5 mm 5 mm lfcsp package is soldered down to a ground plane. to improve thermal dissipation, 25 thermal vias are arranged in a 5 5 array under the exposed paddle. if multiple ground layers exist, they should be tied together using vias. for more information on land pattern design and layout, see the an-772 application note, a design and manufacturing guide for the lead frame chip scale package (lfcsp) . 1 dsain dsaout 25 mil via pad with 13 mil via 8 24 17 09431-068 figure 64. recommended land pattern www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet ADL5243 rev. a | page 27 of 32 evaluation board the schematic of the ADL5243 evaluation board is shown in figure 65 . all rf traces on the evaluation board have a characteristic impedance of 50 and are fabricated from rogers3003 material. the traces are cpwg with a width of 25 mils, spacing of 20 mils, and dielectric thickness of 10 mils. the input and output to the dsa and amplifier should be ac- coupled with capacitors of appropriate value to ensure broadband performance. the bias to amp1 is provided through a choke connected to the amp1out pin and, similarly, bias to amp2 is provided through a choke connected to the amp2out pin. bypassing capacitors are recommended on all supply lines to minimize rf coupling. the dsa and the amplifiers can be individually biased or connected to the vdd plane through resistors r1, r2, and r11. when configuring the ADL5243 evaluation board in the amp1-dsa-amp2 loop, remove capacitors c1, c4, c5, and c8 and remove resistor r10. place 100 pf in place of c2, 10 pf in place of c6, and 0 in place of c7 and c24. if needed, placing a shunt capacitor (1.3 pf) at the output of the dsa improves the output return loss of this loop. on the digital signal traces, provisions for an rc filter are made to clean any potential coupled noise. in normal operation, resistors r3 to r9 are 0 and capacitors c9 to c15 are open. table 10. evaluation board configurations options component function default value c1, c5 ac coupling caps for dsa. c1, c5 = 100 pf c4, c21 ac coupling capacitors for amp1. c4, c21 = 0.1 f c13, c14, c15 power supply bypassing capacitors for amp1. capacitor c15 should be closest to the device. c13 = 1 f c14 = 1.2 nf c15 = 68 pf l1 the bias for amp1 comes through l1 when connected to a 5 v supply. l1 should be high impedance for the frequency of operation, while providing low resistance for the dc current. l1 = 470 nh c8 amp2 input ac-coupling capacitor. c8 = 10 pf c23 amp2 output ac-coupling capacitor. c23 = 10 pf c22 amp2 shunt output tuning capacitor. c22 = 1.0 pf at 244 mils from edge of package c26 anp2 shunt input tuning capacitor. dnp c27 amp2 series input tuning capacitor. c27 = 2.2 pf c28 amp2 shunt input tuning capacitor. c28 = 1.8 pf at 366 mils from edge of package c3, c25, c20 power supply bypassing capacitors for amp2. capacitor c3 should be closest to the device. c3 = 10 pf c25 = 10 nf c20 = 10 f l2 the bias for amp2 comes through l2 when connected to a 5 v supply. l1 should be high impedance for the frequency of operation, while providing low resistance for the dc current. l2 = 9.5 nh c17 power supply bypassing capacitor. c17 = 0.1 f r10, r12 placeholder for the series component for the other frequency band. r10, r12 = 0 r3, r4, r5, r6, r7, r8, r9 digital signal filter resistors. r3, r4, r5, r6, r7, r8, r9 = 0 c9, c10, c11, c12, c16, c18, c19 digital signal filter capacitors. c9, c10, c11, c12, c16, c18, c19 = open c2, c6, c7, c24 replace with capacitors and resistors to connect the device in a loop. c2, c6, c7, c24 = open r1, r2, r11 resistors to connect the supply for the amplifier and the dsa to the same vdd plane. r1, r2 = open s1 switch to change between serial an d parallel mode operation; connect to a supply for parallel mode and to ground for serial mode operation. 3-pin rocker p1 digital control. 9-pin connector www.datasheet.co.kr datasheet pdf - http://www..net/
ADL5243 data sheet rev. a | page 28 of 32 ADL5243 nc d2/le nc d5 nc dsain amp1out/vcc nc amp1in nc nc d6 nc d4 d1/data d0/clk sel1 nc nc d3 vdd nc vbias nc amp2in nc dsaout nc nc vdd amp2out/vcc2 nc r12 r10 c22 c28 c27 c24 c7 c3 l e dat a clk c13 c14 c15 amp1in a mp1out r1 vcc c4 dsain c1 l1 c21 9 8 7 6 5 4 32 31 30 3 29 28 27 26 25 24 23 22 21 20 2 19 18 17 16 15 14 13 12 11 10 1 c2 c17 r2 vdd 2 3 1 s1 amp2out c23 l2 c25 c20 r11 vcc2 c26 c8 amp2in c6 c5 dsaout c9 c10 c11 r3 c12 c16 r6 r4 r5 c18 r7 c19 r8 r9 9 8 7 6 5 4 3 2 1 p1 1f 68pf dni 1pf 9.5nh vdd 470nh 10pf 10pf 0.1f 0.1f 0 ? 100pf dni 0 ? 10pf dni 1.2nf 2.2pf 0.1f 10nf 100pf vdd dni dni dni vdd 10f dni 1.8pf dni dni agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd dni dni dni dni dni dni 0 ? 0 ? 0 ? 0 ? 0 ? 0 ? 0 ? 09431-069 figure 65. ADL5243 evaluation board www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet ADL5243 rev. a | page 29 of 32 09431-070 figure 66. evaluation board layouttop 09431-071 figure 67. evaluation board layoutbottom www.datasheet.co.kr datasheet pdf - http://www..net/
ADL5243 data sheet rev. a | page 30 of 32 outline dimensions 3.45 3.30 sq 3.15 for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. compliant to jedec standards mo-220-vhhd-2 1 32 8 9 25 24 17 16 coplanarity 0.08 3.50 ref 0.50 bsc pin 1 indicator pin 1 indicator 0.30 0.25 0.18 0.20 ref 12 max 0.80 max 0.65 typ 1.00 0.85 0.80 0.05 max 0.02 nom seating plane 0.50 0.40 0.30 5.00 bsc sq 4.75 bsc sq 0.60 max 0.60 max 0.25 min 05-25-2011-a top view exposed pad bottom view figure 68. 32-lead lead frame chip scale package [lfcsp_vq] 5 mm 5 mm body, very thin quad (cp-32-3) dimensions shown in millimeters ordering guide model 1 temperature range package description package option ADL5243acpz-r7 ?40c to +85c 32-lead lead frame chip scale package lfcsp_vq cp-32-3 ADL5243-evalz evaluation board 1 z = rohs compliant part. www.datasheet.co.kr datasheet pdf - http://www..net/
data sheet ADL5243 rev. a | page 31 of 32 notes www.datasheet.co.kr datasheet pdf - http://www..net/
ADL5243 data sheet rev. a | page 32 of 32 notes ?2011 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d09431-0-8/11(a) www.datasheet.co.kr datasheet pdf - http://www..net/

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